Explore projects
-
-
This lab demos the process of adding applications to a Xilinx Yocto Image.
Updated -
Example showing how to build the platform and demo for the zcu104_vcu_ml reference design/demo
Updated -
-
-
-
-
This lab will document the process for running an application on the secondary real-time r5 processor (RPU1) using split mode.
Updated -
-
UltraZED-EV Port of the ZCU106 VCU TRD
Updated -
Updated
-
Scripted build examples for generating custom ZCU106 Vitis Platforms with Overlay Support, including DPU, SOFTMAX, VVAS HLS Accelerators, etc...)
Updated -
Ports of Xilinx TRD reference projects to the Avnet UltraZED UZ7EV SOM + IO Carrier Card
Updated -
Updated
-