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Learn how to get started working with the YoloV3 model with Darknet53 backbone from the Model Zoo in Vitis AI 3.5, including retraining the model with the COCO 2017 training dataset.

Developed with Vivado 2022.1, these behavioral simulations show how to recover native video timing from an AXI4 Video Stream and how to convert natively timed video to AXI4 Streams using catalog IP blocks including the Video Tiiming Controller, AXI4 Stream to Video Out and Video In to AXI4 Stream IP. AXI4 Stream input video is simulated using a Video Test Pattern Generator and the AXI4 Video Stream Remapper IP to show how to convert from 2 pixels per clock to 1 pixel per clock.

Developed with Vivado 2022.1, these behavioral simulations show how to use the Video Test Pattern Generator and highlight how to control the test pattern generation framerate using a Video Timing Controller and Video In to AXI Stream conversion IP. The simulation simulations a QQVGA (160x120) resolution frame size, showing 4 frames generated as fast as the TPG can generate them at 25MHz bus clock, then shows 4 frames generated with 60fps refresh rate timine (1.944MHz Pixel Clock).

UUU (Universal Update Utility)

For a custom board should the PetaLinux project always be created from scratch? This gitlab will compare the pros and cons of using a BSP project verses a Template project for custom board development.

This lab descripts the process of running OpenAMP on the Zynq and Zynq Ultrascale+ MPSoC utilizing APUs and RPUs.

Simple project to allow developing accelerated applications on Ultra96v2 using Vitis Acceleration and PetaLinux.

test

Avnet IoTConnect Demo on STM32 Boards ST - B-L475E-IOT01A (DISCO_L475VG_IOT01A) / B-L4S5I-IOT01A