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Modification of XLX aibox-reid app into face recognition

Scripted build examples for generating custom ZCU106 Vitis Platforms with Overlay Support, including DPU, SOFTMAX, VVAS HLS Accelerators, etc...)

NXP BCU Board Remote Control Utilities

An example project that demonstrates how to create face detection and person detection GStreamer plugins using the Xilinx Vitis-AI-Library.

Utilities / Binaries / Scripts / Config files to build a rootfs for different boards

Linux BSPs for NXP i.MX processors

Yocto meta-layer for MaaXBoard/Mini/Nano

Yocto meta-layer for MaaXBoard/Mini/Nano

Example project showing how to package the Xilinx logiCORE FFT IP as an SDSoC C-Callable library.

Simple project to allow developing accelerated applications on Ultra96v2 using Vitis Acceleration and PetaLinux.

This lab descripts the process of running OpenAMP on the Zynq and Zynq Ultrascale+ MPSoC utilizing APUs and RPUs.

NXP UUU (Universal Update Utility) formerly known as MFGTools v3

Developed with Vivado 2022.1, these behavioral simulations show how to use the Video Test Pattern Generator and highlight how to control the test pattern generation framerate using a Video Timing Controller and Video In to AXI Stream conversion IP. The simulation simulations a QQVGA (160x120) resolution frame size, showing 4 frames generated as fast as the TPG can generate them at 25MHz bus clock, then shows 4 frames generated with 60fps refresh rate timine (1.944MHz Pixel Clock).