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ZCU104 DPU Example Designs for the Vivado Flow.

Yocto meta-layer for MaaXBoard/Mini/Nano

This lab will document the process for running an application on the secondary real-time r5 processor (RPU1) using split mode.

The example design can be used as a reference of how to properly instantiate the Video TPG in a block design and configure a Linux build to generate (and display) test patterns using GStreamer. Four test pattern generator configurations are provided:

(1) Free Running mode (2) Free Running mode with Colorspace Conversion and Scaling using the Video Processing Subsystem IP (3) Rate Controlled mode (4) Rate Controlled mode with Colorspace Conversion and Scaling using the Video Processing Subsystem IP

Yocto meta-layer for MaaXBoard/Mini/Nano

The gitlab will demonstrate the process of creating a meta-user recipe to build custom R5 RPU applications.

Scripted build examples for generating custom ZCU106 Vitis Platforms with Overlay Support, including DPU, SOFTMAX, VVAS HLS Accelerators, etc...)

Jason's collection of custom Vitis Platform recipes. NOTE: The platforms in this repository are for training, debug and integration. WARNING: Makefile stages have been broken up into shell scripts on the back end and MAKE dependencies have been removed. If a MAKE stage fails the build will continue, so be sure to check the console log for errors when using projects from this repository.

This lab demos the process of adding applications to a Xilinx Yocto Image.